204222 Digital System Design
Class Homepage http://www.cpe.ku.ac.th/~pom/courses/204222/204222.html
Class Syllabus http://www.cpe.ku.ac.th/~pom/courses/204222/syllabus.doc
Annoucement
Lecture Note
Lecture 0 Course overview (.ppt)
Lecture 1 Digital System and Binary Number (.ppt)
Lecture 2 Boolean Algebra and Logic Gate (.ppt)
Lecture 3 Gate Level Minimization (.ppt)
Lecture 4 Combinational Circuit (.ppt)
Lecture 5 Latch and Flip Flop (.ppt)
Lecture 5-1
Analysis Sequential Circuit (.ppt)
Lecture 5-2 More example on Analysis Sequential Circuit (.ppt)
Lecture 5-3
State Reduction (.ppt)
Lecture 5-4 Sequential Circuit Design (.ppt)
Homework 1
Chapter 1 1.4, 1.13,1.20,1.22,1.25,1.35,1.36
Chapter 2 2.3,2.9,2.13,2.18,2.24,2.28
Chapter 3
3.7,3.10,3.16,3.20,3.26,3.29
Homework I Solution
Homework 2
Chapter 4 4.4,4.14,4.20,4.21,4.24,4.25
Chapter 5 5.5,5.7,5.9,5.14,5.15
Homework Due 11/2/2008
Additional Note
VHDL (Thai) โดย นอ ชาติชาย ดิษฐกุล รน.
VHDL Reference ภาษาไทย NECTEC
Example Counter
[Last Update
January 30, 2008 3:43 PM
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